the ITS sub-detector (Inner Tracking System) of the ALICE detector (A Large Ion Collider Experiment) is a apex detector and is the detector closest to the point of interaction. It consists of 3 types of sub-detectors, two layers of silicon pixel (Silicon Pixel detectors), 2 Silicon Drift detectors (Silicon Drift detectors) and 2 Silicon Strip detectors. The primary function of the ITS is to identify and track transverse low momentary particles. The ITS detector in its two most internal layers are equipped with silicon sensors based on hybrid pixels. To replace this pixel technology, the current ITS detector will be replaced by a new single-technology detector, extending its spatial resolution and improving trace tracking. This new detector will consist of seven layers of monolithic active pixel sensors (MAPS), which must meet the material budget requirements and be tolerant to higher radiation levels for new scenarios of luminosity increases and higher collision rates. The MAPS sensors integrating the image sensor and the reading circuits are on the same silicon wafer, have great advantages in good position resolution and a low material budget in terms of low production cost. TowerJazz offers the possibility of a quadruple-WELL by isolating the pMOS transistors in the same nWELL, avoiding competition with the pick-up electrode, allowing more complex and compact circuits to be implemented within the active area and also having a high resistivity epitaxial layer. This technology provides a very small oxide door by limiting radiation surface damage to make it suitable for denxiii use of the ALICE experiment. Intensive R & D has been carried out in MAPS in the last four years as part of the update of ALICE’s ITS. Several small-scale prototypes have been successfully developed and tested with X-rays, radioactive sources and particle beams. The radiation tolerance of ALICE ITS is moderate with a TID irradiation tolerance of 700 krad and Niel of 1 × 1013 1 MeV neqcm ¿2, MAPS is a viable option for updating the ITS. The original contribution of this thesis is the implementation of a new digital pixel reading architecture for MAPS. This thesis presents an asynchronous encoder of addresses (architecture based on the removal of zeros by transmitting the address of the excited pixels called PADRE) for the ALPIDE architecture, the author also made a significant contribution to the assembly and verification of circuits. Father is the author’s main research, based on a four-entry hierarchical priority encoder and is an alternative to the rolling-shutter reading architecture. In addition to small-scale prototypes, prototypes have also been developed on a full scale to the needs of the ITS detector (15 mm and 30 mm) using a new reading circuit based on the personalised version of the PADRE circuit. PALPIDEfs was the first full-scale prototype and characterised with a matrix reading time below 4 µs and energy consumption in the order of 80 mWcm 2. Overall, the results obtained represent a significant advance of MAPS technology in terms of energy consumption, reading speed, load harvesting time and radiation tolerance. The PALPIDE2 sensor has proven to be a very attractive option for the new ITS detector, meeting the requirements in terms of detection efficiency, fake-hit rate and position resolution, as its performance cannot be achieved by prototypes based on traditional reading architecture such as: